Blogs (9) >>
SPLASH 2016
Sun 30 October - Fri 4 November 2016 Amsterdam, Netherlands
Tue 1 Nov 2016 11:45 - 12:10 at St Gallen - Session 2 Chair(s): Tamer Dallou

Thread-level Speculation (TLS) is a technique for automatic parallelization. The complexity of even prototype implementations, however, limits the ability to explore and compare the wide variety of possible design choices, and also makes understanding performance characteristics difficult. In this work we build a general analytical model of the method-level variant of TLS which we can use for determining program speedup under a wide range of TLS designs. Our approach is exhaustive, and using either simple brute force or more efficient dynamic programming implementations we are able to show how performance is strongly limited by program structure, as well as core choices in speculation design, irrespective of and complementary to the impact of data-dependencies. These results provide new, high-level insight into where and how thread-level speculation can and should be applied in order to produce practical speedup.

Conference Day
Tue 1 Nov

Displayed time zone: Amsterdam, Berlin, Bern, Rome, Stockholm, Vienna change

10:30 - 12:10
Session 2SEPS at St Gallen
Chair(s): Tamer DallouLG Electronics San Jose Lab
10:30
25m
Talk
Reducing Parallelizing Compilation Time by Removing Redundant Analysis
SEPS
Jixin HanWaseda University, Japan, Rina FujinoWaseda University, Japan, Ryota TamuraWaseda University, Japan, Mamoru ShimaokaWaseda University, Japan, Hiroki MikamiWaseda University, Japan, Moriyuki TakamuraOSCAR TECHNOLOGY, Japan, Sachio KamiyaOSCAR TECHNOLOGY, Japan, Kazuhiko SuzukiOSCAR TECHNOLOGY, Japan, Takahiro MiyajimaOSCAR TECHNOLOGY, Japan, Keiji Kimura Waseda University, Hironori KasaharaWaseda University, Japan
DOI
10:55
25m
Talk
A Divide-and-Conquer Parallel Pattern Implementation for Multicores
SEPS
Marco DaneluttoUniversity of Pisa, Italy, Tiziano De MatteisUniversity of Pisa, Italy, Gabriele MencagliUniversity of Pisa, Italy, Massimo TorquatiUniversity of Pisa, Italy
DOI
11:20
25m
Talk
Parallel Evaluation of a DSP Algorithm using Julia
SEPS
Peter KourzanovNXP, Netherlands
DOI
11:45
25m
Talk
Exhaustive Analysis of Thread-Level Speculation
SEPS
Clark VerbruggeMcGill University, Canada, Christopher J. F. PickettMcGill University, Canada, Alexander KrolikMcGill University, Canada, Allan KielstraIBM, Canada
DOI