A Divide-and-Conquer Parallel Pattern Implementation for Multicores
Divide-and-Conquer (DaC) is a sequential programming paradigm which models a large class of algorithms used in real-life applications. Although suitable to extract parallelism in a straightforward way, the parallel implementation of DaC algorithms still requires some expertise in parallel programming tools by the programmer.
In this paper we aim at providing to non-expert programmers a high-level solution for fast prototyping parallel DaC programs on multicores with minimal programming effort.
Following the rationale of parallel design pattern methodology, we design a C++11-compliant template interface for developing parallel DaC programs. The interface is implemented using different back-end frameworks (i.e. OpenMP, Intel TBB and FastFlow) supporting source code reuse and a certain amount of performance portability.
Experiments on a 24-core Intel server show the effectiveness of our approach: with a reduced programming effort the programmer easily prototypes parallel versions with performance comparable with hand-made parallelizations.
Tue 1 NovDisplayed time zone: Amsterdam, Berlin, Bern, Rome, Stockholm, Vienna change
10:30 - 12:10 | |||
10:30 25mTalk | Reducing Parallelizing Compilation Time by Removing Redundant Analysis SEPS Jixin Han Waseda University, Japan, Rina Fujino Waseda University, Japan, Ryota Tamura Waseda University, Japan, Mamoru Shimaoka Waseda University, Japan, Hiroki Mikami Waseda University, Japan, Moriyuki Takamura OSCAR TECHNOLOGY, Japan, Sachio Kamiya OSCAR TECHNOLOGY, Japan, Kazuhiko Suzuki OSCAR TECHNOLOGY, Japan, Takahiro Miyajima OSCAR TECHNOLOGY, Japan, Keiji Kimura Waseda University, Hironori Kasahara Waseda University, Japan DOI | ||
10:55 25mTalk | A Divide-and-Conquer Parallel Pattern Implementation for Multicores SEPS Marco Danelutto University of Pisa, Italy, Tiziano De Matteis University of Pisa, Italy, Gabriele Mencagli University of Pisa, Italy, Massimo Torquati University of Pisa, Italy DOI | ||
11:20 25mTalk | Parallel Evaluation of a DSP Algorithm using Julia SEPS Peter Kourzanov NXP, Netherlands DOI | ||
11:45 25mTalk | Exhaustive Analysis of Thread-Level Speculation SEPS Clark Verbrugge McGill University, Canada, Christopher J. F. Pickett McGill University, Canada, Alexander Krolik McGill University, Canada, Allan Kielstra IBM, Canada DOI | ||